On redundancy-modified NAND multiplexing

doi:10.21629/JSEE.2018.04.21

Journal of Systems Engineering and Electronics ›› 2018, Vol. 29 ›› Issue (4): 864-872.doi: 10.21629/JSEE.2018.04.21

• Reliability • Previous Articles Next Articles

On redundancy-modified NAND multiplexing

Ming DIAO¹(), Lianhua YU^1,*(), Xiaobo CHEN²()

¹ College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China
² College of Automation, Harbin Engineering University, Harbin 150001, China

Received:2016-12-06 Online:2018-08-01 Published:2018-08-30
Contact: Lianhua YU E-mail:diaoming@hrbeu.edu.cn;ruying0714@hotmail.com;cxiaobo@hotmail.com
About author:DIAO Ming was born in 1960. He received his B.S. degree in communication and information system from Harbin Engineering University, Harbin, China, in 1987. He is currently a senior member of China Communications Institute, a member of China Society of Image and Graphics, a member of explorations professional committee of China Aerospace Society and a professor and doctoral supervisor with the Harbin Engineering University, China. He is also an editorial board member of Journal of Harbin Engineering University. His current research interests include the detection, processing and recognition of broadband signal and communication signal processing. He has been involved in more than 10 provincial scientific research projects and published over a hundred academic papers. E-mail: diaoming@hrbeu.edu.cn|YU Lianhua was born in 1989. She received her B.E. degree in electronic information engineering from Harbin Engineering University, Harbin, China, in 2012. She is currently working toward her Ph.D. degree in information and communication engineering at Harbin Engineering University. Her major research interests include fault-tolerant computation, reliable computing with unreliable components, and nanoelectronic system architectures. E-mail: ruying0714@hotmail.com|CHEN Xiaobo was born in 1989. He received his B.E. degree in communication engineering from Harbin Engineering University, Harbin, China, in 2011. He is currently working toward his Ph.D. degree in navigation, guidance and control at Harbin Engineering University. His research interests include navigation systems, nonlinear control systems and applications, formation control, and signal processing. E-mail: cxiaobo@hotmail.com
Supported by:
the National Natural Science Foundation of China(61571149);This work was supported by the National Natural Science Foundation of China (61571149)

Abstract

Abstract:

In order to make systems that are based on unreliable components reliable, the design of fault tolerant architectures will be necessary. Inspired by von Neumann's negative AND (NAND) multiplexing and William's interwoven redundant logic, this paper presents a fault tolerant technique based on redundancy-modified NAND gates for future nanocomputers. Bifurcation theory is used to analyze fault tolerant ability of the system and the simulation results show that the new system has a much higher fault tolerant ability than the conventional multiplexing based on NAND gates. According to the evaluation, the proposed architecture can tolerate a device error rate of up to 10^?1, with multiple redundant components. This fault tolerant technique is potentially useful for future nanoelectronics.

Key words: fault tolerant, multiplexing, redundancy-modified negative AND (NAND) gate

Ming DIAO, Lianhua YU, Xiaobo CHEN. On redundancy-modified NAND multiplexing[J]. Journal of Systems Engineering and Electronics, 2018, 29(4): 864-872.

Figures/Tables 9

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References 30

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On redundancy-modified NAND multiplexing

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